| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| SYNC_SIG[22].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[21].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[20].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[19].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[18].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[17].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[16].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[15].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[14].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[13].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[12].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[11].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[10].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[9].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[8].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[7].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[6].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[5].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[4].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[3].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[2].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[1].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| SYNC_SIG[0].SyncStage_inst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| RegFile_BMC_inst_0 |
49 |
19 |
5 |
19 |
392 |
19 |
19 |
19 |
0 |
0 |
0 |
0 |
0 |
| RegFile_CPU_inst_0 |
33 |
8 |
5 |
8 |
2056 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| IIC_Decoder_BMC_inst|mSDAGlitchFilter |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| IIC_Decoder_BMC_inst|mSCLGlitchFilter |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| IIC_Decoder_BMC_inst |
21 |
9 |
0 |
9 |
36 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
| IIC_Decoder_CPU_inst|mSDAGlitchFilter |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| IIC_Decoder_CPU_inst|mSCLGlitchFilter |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| IIC_Decoder_CPU_inst |
21 |
9 |
0 |
9 |
36 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
| Flag_Inst_100ms |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Flag_Inst_1ms |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Flag_Inst_100us |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |